Alif Semiconductor /AE512F80F55D5AS_CM55_HE_View /LPSPI /SPI_TXFTLR

Transmit FIFO Threshold. Controls the level of entries (or below) at which the transmit FIFO controller triggers an interrupt. The FIFO depth is 16. If the value in this bit field is set greater than or equal to the depth of the FIFO, this bit field is not written and retains its current value. When the number of transmit FIFO entries is less than or equal to this value, the transmit FIFO empty interrupt is triggered.

Transfer Start FIFO Level. Used to control the level of entries in transmit FIFO above which transfer will start on serial line. This bit field is used to ensure that sufficient data is present in transmit FIFO before starting a write operation on serial line. These field is valid only for Master mode of operation. Note: This field is functional only for SPI module. It is not functional for LPSPI module.